[Buildroot] [PATCH v5 2/2] add configs/zynqmp_zcu102_defconfig

Neal Frager nealf at xilinx.com
Fri Feb 11 13:16:14 UTC 2022


Hi Luca,

I have encountered yet another issue.  

If the pm_cfg_obj.c file is generated with Vitis 2021.2, it looks like the following:
There is a new "#define PM_CONFIG_OBJECT_TYPE_BASE	0x1U"
which breaks the pm_cfg_obj_convert.py.

Could you generate a new version of the script that supports the Vitis 2021 file format?

I have attached an example which is what Vitis generates for the zcu106 evaluation board.

/******************************************************************************
* Copyright (c) 2017 - 2021 Xilinx, Inc.  All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/

#include "xil_types.h"
#include "pm_defs.h"

#define PM_CONFIG_MASTER_SECTION_ID	0x101U
#define PM_CONFIG_SLAVE_SECTION_ID	0x102U
#define PM_CONFIG_PREALLOC_SECTION_ID	0x103U
#define PM_CONFIG_POWER_SECTION_ID	0x104U
#define PM_CONFIG_RESET_SECTION_ID	0x105U
#define PM_CONFIG_SHUTDOWN_SECTION_ID	0x106U
#define PM_CONFIG_SET_CONFIG_SECTION_ID	0x107U
#define PM_CONFIG_GPO_SECTION_ID	0x108U

#define PM_SLAVE_FLAG_IS_SHAREABLE	0x1U
#define PM_MASTER_USING_SLAVE_MASK	0x2U

#define PM_CONFIG_GPO1_MIO_PIN_34_MAP	(1U << 10U)
#define PM_CONFIG_GPO1_MIO_PIN_35_MAP	(1U << 11U)
#define PM_CONFIG_GPO1_MIO_PIN_36_MAP	(1U << 12U)
#define PM_CONFIG_GPO1_MIO_PIN_37_MAP	(1U << 13U)

#define PM_CONFIG_GPO1_BIT_2_MASK	(1U << 2U)
#define PM_CONFIG_GPO1_BIT_3_MASK	(1U << 3U)
#define PM_CONFIG_GPO1_BIT_4_MASK	(1U << 4U)
#define PM_CONFIG_GPO1_BIT_5_MASK	(1U << 5U)

#define SUSPEND_TIMEOUT	0xFFFFFFFFU

#define PM_CONFIG_OBJECT_TYPE_BASE	0x1U


#define PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK    0x00000001
#define PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK    0x00000100
#define PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK    0x00000200



#if defined (__ICCARM__)
#pragma language=save
#pragma language=extended
#endif
#if defined (__GNUC__)
    const u32 XPm_ConfigObject[] __attribute__((used, section(".sys_cfg_data"))) =
#elif defined (__ICCARM__)
#pragma location = ".sys_cfg_data"
__root const u32 XPm_ConfigObject[] =
#endif
{

Best regards,
Neal Frager
Xilinx
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