[Buildroot] [PATCH] package/glibc: disable on RISC-V ilp32f and lp64f, not supported

[Arnout Vandecappelle]

On 03/04/2025 09:12, Thomas Petazzoni via buildroot wrote:
> glibc fails to build on RISC-V 32-bit with the ilp32f ABI and on
> RISC-V 64-bit with the lp64f: both use single-point precision floating
> point, which glibc doesn't support, failing during the configure step
> with:
>
>    configure: error: glibc does not yet support the single floating-point ABI
>
> Fix that by disabling glibc support on those configurations.
>
> Fixes:
>
>    https://autobuild.buildroot.org/results/fe8d569cab507992978ef0da649278dd3a9e0b23/
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni at bootlin.com>

  Applied to 2025.02.x, 2024.11.x and 2024.02.x, thanks.

  Regards,
  Arnout

> ---
>   package/glibc/Config.in | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/package/glibc/Config.in b/package/glibc/Config.in
> index d464b3def8..52752e975e 100644
> --- a/package/glibc/Config.in
> +++ b/package/glibc/Config.in
> @@ -22,7 +22,9 @@ config BR2_PACKAGE_GLIBC_ARCH_SUPPORTS
>   	default y if BR2_microblaze
>   	default y if BR2_arc && BR2_ARC_ATOMIC_EXT && !BR2_arc750d && !BR2_arc770d
>   	depends on !BR2_POWERPC_CPU_HAS_SPE
> -	depends on BR2_RISCV_ISA_RVA || !BR2_riscv
> +	# glibc needs atomic instructions, and does not support
> +	# single-precision floating point ABIs (ilp32f and lp64f)
> +	depends on (BR2_RISCV_ISA_RVA && !BR2_RISCV_ABI_ILP32F && !BR2_RISCV_ABI_LP64F) || !BR2_riscv
>   	depends on BR2_USE_MMU
>   
>   config BR2_PACKAGE_GLIBC_SUPPORTS